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switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) pin configuration (top view) description m51995a is the primary switching regulator controller which is especially designed to get the regulated dc voltage from ac power supply. this ic can directly drive the mos-fet with fast rise and fast fall output pulse. type m51995a has the functions of not only high frequency osc and fast output drive but also current limit with fast response and high sensibility so the true "fast switching regulator" can be realized. it has another big feature of current protection to short and over current,owing to the integrated timer-type protection circuit,if few parts are added to the primary side. the m51995a is equivalent to the m51977 with externally re- settable ovp(over voltage protection)circuit. features 500khz operation to mos fet ?utput current...............................................................?a ?utput rise time 60ns,fall time 40ns ?odified totempole output method with small through current compact and light-weight power supply ?mall start-up current............................................90? typ. ?ig difference between "start-up voltage" and "stop voltage" makes the smoothing capacitor of the power input section small. start-up threshold 16v,stop voltage 10v ?ackages with high power dissipation are used to with-stand the heat generated by the gate-drive current of mos fet. 16-pin dip,20-pin sop 1.5w(at 25?) simplified peripheral circuit with protection circuit and built-in large-capacity totempole output ?igh-speed current limiting circuit using pulse-by-pulse method(two system of clm+pin,clm-pin) ?rotection by intermittent operation of output over current...... ..........................................................timer protection circuit ?ver-voltage protection circuit with an externally re-settable latch(ovp) ?rotection circuit for output miss action at low supply voltage(uvlo) high-performance and highly functional power supply ?riangular wave oscillator for easy dead time setting application feed forward regulator,fly-back regulator 1 16 13 14 15 1 4 3 2 12 5 11 6 10 7 9 8 20 17 18 19 1 4 3 2 16 5 15 6 14 7 13 8 12 9 11 10 recommended operating conditions supply voltage range............................................12 to 36v operating frequency.................................less than 500khz oscillator frequency setting resistance ?-on pin resistance r on ...........................10k to 75k w ?-off pin resistance r off ..........................2k to 30k w collector v out emitter vf on/off ovp det f/b
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) block diagram clm- -current limit f/b collector emitter voltage regulator v v a 36 36 ? ?.15 vcc vcc -4.0 to +4.0 symbol ratings unit parameter conditions absolute maximum ratings v cc supply voltage collector voltage output current v f terminal voltage on/off terminal voltage clm-terminal voltage v c i o v vf v v ma mw/?c -0.3 to +4.0 8 6 5 0~10 -1 -2 clm+terminal voltage ovp terminal current det terminal voltage power dissipation thermal derating factor operating temperature storage temperature p d k t opr t stg w ?c 1.5 12 -30 to +85 -40 to +125 150 ta=25?c ta>25?c tj junction temperature peak continuous 2 v on/off v clm- v clm+ i ovp v det i det v fb i ton i toff det terminal input current f/b terminal voltage t-on terminal input current t-off terminal input current ?c ?c ma ma v ma v v v note 1."+" sign shows the direction of current flow into the ic and "-" sign shows the current flow from the ic. 2.this terminal has the constant voltage characteristic of 6 to 8v,when current is supplied from outside.the maximum allowable voltage is 6v when the constant voltage is applied to this terminal.and maximum allowable current into this terminal is 5ma. 3.the low impedance voltage supply should not be applied to the ovp terminal. v cc det gnd under voltage lockout v out 2.5v op amp pwm latch pwm comparator intermittent action intermittent action and osc control -current limit latch +current limit latch oscillator (triangle) clm+ +current limit ct intermittent operation determine capacitance latch 500 6s 1s 3k 1s 1s 15.2k 7.1v 5.8v on/off ovp(shut down) oscillator capacitance cf oscillator resistance t-on (on duty) oscillator resistance t-off (off duty) vf
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) d vcc=vcc (start) - vcc (stop) operation stop voltage stand-by current operating supply voltage range operating circuit current circuit current in off state on/off terminal high threshold voltage current at 0% duty limits min. typ. max. symbol test conditions unit parameter electrical characteristics (v cc =18v, ta=25?, unless otherwise noted) v vcc(stop) 35 block v cc(start) v cc v thh on/off v thl on/off d v thon/off i fbmind 16.2 17.2 v 9.0 9.9 10.9 6.3 7.6 90 ma ? v v v w v db ? ? v terminal voltage terminal resistance difference supply voltage between operation stop and ovp reset detection voltage input current of detection amp voltage gain of detection amp ovp terminal hysteresis voltage ovp reset supply voltage d i fb v fb r fb v cc(stop) - v ccovpc v det i indet g avdet v thovph d v thovp i thovp i inovp v ccovpc
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) maximum on duty upper limit voltage of oscillation waveform oscillating frequency voltage difference between upper limit and lower limit of osc waveform osc frequency in clm operating state duty in clm operating state v f voltage at timer operating start v f terminal input current output low voltage output high voltage output voltage rise time limits min. typ. max. symbol test conditions unit parameter electrical characteristics (v cc =18v,ta=25?c, unless otherwise noted)(continue) block f osc t duty v osch v oscl d v osc ? v v v ns ns output voltage fall time 4
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 5 typical characteristics 0 300 600 900 1200 1500 1800 0 25 50 75 100 125 150 85 thermal derating (maximum rating) ambient temperature ta(?)
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 6 ambient temperature ta(?) ambient temperature ta(?) ambient temperature ta(?) ambient temperature ta(?) ambient temperature ta(?) threshold voltage of on/off terminal vs.ambient temperature threshold voltage of on/off terminal vs.ambient temperature input current of vf terminal vs.input voltage discharge current of timer vs.ambient temperature on and off duration of timer vs.ambient temperature (intermittent operation) charge current of timer vs.ambient temperature
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 7 ambient temperature ta(?) ambient temperature ta(?) ambient temperature ta(?) 2.5 3.0 3.5 -60 -40 -20 0 20 40 60 80 100 vf threshold voltage for timer vs. ambient temperature
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 8 ambient temperature ta(?) ambient temperature ta(?) output low voltage vs. output sink current detection voltage vs. ambient temperature input current of detection amp vs. ambient temperature detection amp voltage gain vs. frequency on duty vs. f/b terminal input current on duty vs. f/b terminal input current 5.0 4.0 3.0 2.0 1.0 0 1m 10m 100m 1 10 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 100 1k 10k 100k 1m 10m 50.0 40.0 30.0 20.0 10.0 0 frequency f(hz) 2.40 2.45 2.50 2.55
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 9 ambient temperature ta(?) ambient temperature ta(?) ambient temperature ta(?) on duty vs. f/b terminal input current upper & lower limit voltage of osc vs. ambient temperature oscillating frequency vs. cf terminal capacity on duty vs. r off oscillating frequency vs. ambient temperature oscillating frequency vs. ambient temperature -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 0 0.5 1.0 1.5 2.0 2.5 1 10 100 1000 10000 f/b terminal input current i f/b (ma)
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 10 on duty vs. ambient temperature on duty vs. ambient temperature on duty vs. ambient temperature 0 10 20 30 40 50 60 70 80 90 100
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 11 current from ovp terminal for ovp reset vs. supply voltage supply voltage vcc(v) 0 5 10 15 20 25 30 35 40 0 100 200 300 400 500 600 700 800
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) function description 12 type m51995ap and m51995afp are especially designed for off-line primary pwm control ic of switching mode power supply (smps) to get dc voltage from ac power supply. using this ic,smart smps can be realized with reasonable cost and compact size as the number of external electric parts can be reduced and also parts can be replaced by reasonable one. in the following circuit diagram,mos-fit is used for output transistor,however bipolar transistor can be used with no problem. 3 15 13 14 9 10 11 12 8 6 7 m51995ap 5 16 4 2 1 r off r on a c fin ac r1 r2 cvcc c t c f f/b ovp on/off v out1 v out2 a pin no.is related with m51995ap fig.1 example application circuit diagram of feed forward regulator 3 15 13 14 9 10 11 12 8 6 7 m51995ap 5 16 4 2 1 r off r on c fin ac r1 r22 cvcc c f v out pin no.is related with m51995ap fig.2 example application circuit diagram of fly-back regulator ovp f/b r21
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 13 start-up circuit section the start-up current is such low current level as typical 90 a,as shown in fig.3,when the vcc voltage is increased from low level to start-up voltage vcc (start) . in this voltage range,only a few parts in this ic,which has the function to make the output voltage low level,is alive and icc current is used to keep output low level.the large voltage difference between vcc (start) and vcc (stop) makes start-up easy,because it takes rather long duration from vcc (start) to vcc (stop) . oscillator section the oscillation waveform is the triangle one.the on-duration of output pulse depends on the rising duration of the triangle waveform and dead-time is decided by the falling duration. the rising duration is determined by the product of external resistor r on and capacitor c f and the falling duration is mainly determined by the product of resistor r off and capacitor c f . (1)oscillator operation when intermittent action and osc control circuit does not operate fig.4 shows the equivalent charging and discharging circuit diagram of oscillator when the current limiting circuit does not operate.it means that intermittent action and osc control circuit does not operate. the current flows through r on from the constant voltage source of 5.8v.c f is charged up by the same amplitude as r on current,when internal switch sw1 is switched to "charging side".the rise rate of c f terminal is given as vcc (stop) vcc (start) icco 14ma icc l 90?
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 14 (2)oscillator operation when intermittent action and osc control circuit operates. when over current signal is applied to clm+ or clm- terminal,and the current limiting circuit,intermittent action and osc control circuit starts to operate.in this case t-off terminal voltage depends on vf terminal voltage,so the oscillation frequency decreases and dead-time spreads. the oscillation period is given by the summation of equation(7) and (8). as shown in fig.7,the internal circuit kills the first output pulse in the output waveform.the output waveform will appear from the second pulse cycle because the duration of first cycle takes c f charging time longer comparing with that at the stable operating state. usually the applied voltage to vf terminal must be proportional the output voltage of the regulator. so when the over current occurs and the output voltage of the regulator becomes low,the off-duration becomes wide. there are two methods to get the control voltage,which depends on the output voltage,on primary side.for the fly back type regulator application,the induced voltage on the third or bias winding is dependent on output voltage.on the other hand,for the feed forward type regulator application,it can be used that the output voltage depends on the product of induced voltage and "on-duty",as the current of choke coil will continue at over load condition,it means the "continuous current" condition. fig.8 shows one of the examples for vf terminal application for the feed forward type regulator. fig.6 osc.waveform with operation of intermittent and osc.control circuit operation
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 15 pwm comparator and pwm latch section fig.9 shows the pwm comparator and latch section. the on- duration of output waveform coincides with the rising duration of cf terminal waveform,when the infinitive resistor is connected between f/b terminal and gnd. when the f/b terminal has finite impedance and current flows out from f/b terminal,"a" point potential shown in fig.9 depends on this current.so the "a" point potential is close to gnd level when the flow-out current becomes large. "a" point potential is compared with the cf terminal oscillator waveform and pwm comparator,and the latch circuit is set when the potential of oscillator waveform is higher than "a" point potential. on the other hand,this latch circuit is reset by high level signal during the dead-time of oscillation(falling duration of oscillation waveform).so the "b" point potential or output waveform of latch circuit is the one shown in fig.10. the final output waveform or "c" point potential is got by combining the "b" point signal and dead-time signal logically.(please refer to fig.10) current limiting section when the current-limit signal is applied before the crossing instant of "a" pint potential and cf terminal voltage shown in fig.9,this signal makes the output "off" and the off state will continue until next cycle.fig.11 shows the timing relation among them. the current limiting circuit has two input terminals,one has the detector-sensitivity of +200mv to the gnd terminal and the other has -200mv.the circuit will be latched if the input signal is over the limit of either terminal. if the current limiting circuit is set,no waveform is generated at output terminal however this state is reset during the succeeding dead-time. so this current limiting circuit is able to have the function in every cycle,and is named "pulse-by-pulse current limit". fig.9 pwm comparator and latch circuit + - f/b cf from osc to output point c point b latch pwm comp point a 5.8v
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 16 it is rather recommended to use not "clm+" but "clm-" terminal,as the influence from the gate drive current of mos-fit can be eliminated and wide voltage rating of + 4v to -4v is guaranteed for absolute maximum rating. there happen some noise voltage on r clm during the switching of power transistor due to the snubber circuit and stray capacitor of the transformer windings. to eliminate the abnormal operation by the noise voltage,the low pass filter,which consists of r nf and c nf is used as shown in fig.12. it is recommended to use 10 to 100 w for r nf because such range of r nf is not influenced by the flow-out current of some 200? from c lm terminal and c nf is designed to have the enough value to absorb the noise voltage. intermittent action and oscillation control section when the internal current limiting circuit states to operate and also the vf level decreases to lower than the certain level of some 3v,the dead-time spreads and intermittent action and osc control circuit(which is one of the timer-type-protection circuit)starts to operate. the intermittent action and osc control circuit is the one to generate the control signal for oscillator and intermittent action circuit. fig.13 shows the timing-chart of this circuit.when the output of intermittent action and oscillation control is at "high" level,the waveform of oscillator depends on the vf terminal voltage and the intermittent action circuit begins to operate. intermittent action circuit section intermittent action circuit will start to operate when the output signal from the intermittent action and oscillation control circuit are "high" and also vf terminal voltage is lower than v thtime of about 3v. fig.14 shows the block diagram of intermittent action circuit.transistor q is on state when vf terminal voltage is higher than v thtime of about 3v,so the ct terminal voltage is near to gnd potential. when vf terminal voltage is lower than v thtime ,q becomes "off" and the ct has the possibility to be charged up. under this condition,if the intermittent action and oscillation control signal become "high" the switch swa will close only in this "high" duration and c t is charged up by the current of 120? through sw a (sw b is open) and ct terminal potential will rise.the output pulse can be generated only this duration. when the ct terminal voltage reaches to 8v,the control logic circuit makes the sw a "off" and sw b "on",in order to flow in the i timeoff of 15? to ct terminal. the ic operation will be ceased in the falling duration. on the other hand,when ct terminal voltage decreases to lower than 2v,the ic operation will be reset to original state,as the control logic circuit makes the sw a "on" and sw b "off". therefore the parts in power circuit including secondary rectifier diodes are protected from the overheat by the over current. m51995a + v out clm+ gnd r nf c nf r clm (a)in case of clm+ m51995a + v out clm- gnd r nf c nf r clm (b)in case of clm- osc waveform of cf terminal current limit signal output of current limit latch (a) with current limit signal output of intermittent action and osc. control circuit osc waveform of cf terminal gnd gnd gnd current limit signal output of current limit latch output of intermittent action and osc. control circuit (b) without current limit signal fig.12 how to connect current limit circuit fig.13 timing chart of intermittent and osc.control circuit fig.14 block diagram of intermittent action circuit vf v thtime (~ 3v) swa swb b a control logic ct ct i timeoff i timeon (~120?) (~15?) q
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 17 fig.16 shows the icc versus vcc in this timer-off duration. in this duration the power is not supplied to ic from the third winding of transformer but through from the resistor r1 connected tovcc line. if the r1 shown in fig.1 and 2 is selected adequate value,vcc terminal voltage will be kept at not so high or low but adequate value,as the icc versus vcc characteristics has such the one shown in fig.16. to ground the ct terminal is recommended,when the intermittent mode is not used. in this case the oscillated frequency will become low but the ic will neither stop the oscillation nor change to the intermittent action mode,when the current limit function becomes to operate and the vf terminal voltage becomes low. voltage detector circuit(det) section the det terminal can be used to control the output voltage which is determined by the winding ratio of fly back transformer in fly-back system or in case of common ground circuit of primary and secondary in feed forward system. the circuit diagram is quite similar to that of shunt regulator type 431 as shown in fig.17.as well known from fig.17 and fig.18,the output of op amp has the current-sink ability,when the det terminal voltage is higher than 2.5v but it becomes high impedance state when lower than 2.5v det terminal and f/b terminal have inverting phase characteristics each other,so it is recommended to connect the resistor and capacitor in series between them for phase compensation.it is very important,one can not connect by resistor directly as there is the voltage difference between them and the capacitor has the dc stopper function. fig.19 shows the circuit diagram of on-off circuit.the current flown into the on-off terminal makes the q4 "on" and the switching operation stop.on the other hand.the switching operation will recover as no current flown into on/off terminal makes q4 "off" as the constant current source connected to q4 base terminal has such the hysteresis characteristics of 20? at operation and 3? at stopping.so the unstable operation is not appeared even if the on/off terminal voltage signal varies slowly. on-off circuit section supply voltage vcc(v)
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 18 fig.20 shows how to connect the on/off terminal.the switching operation will stop by swich-off and operate by switch- on. transistor or photo transistor can be replaced by this switch,of course.no resistor of 30 to 100k w is connected and on/off terminal is directly connected to gnd,when it is not necessary to use the on/off operation. fig.21 shows the icc versus vcc characteristics in off state and vcc will be kept at not so high or low but at the adequate voltage,when r1 shown in fig.1 and 2 is selected properly. ovp circuit is basically positive feedback circuit constructed by q2,q3 as shown in fig.22. q2,q3 turn on and the circuit operation of ic stops,when the input signal is applied to ovp terminal.(threshold voltage ~ 750mv) the current value of i2 is about 150? when the ovp does not operates but it decreases to about 2? when ovp operates. it is necessary to input the sufficient larger current(800? to 8ma)than i2 for triggering the ovp operation. the reason to decrease i2 is that it is necessary that icc at the ovp rest supply voltage is small. it is necessary that ovp state holds by circuit current from r1 in the application example,so this ic has the characteristic of small icc at the ovp reset supply voltage(~stand-by current + 20?) on the other hand,the circuit current is large in the higher supply voltage,so the supply voltage of this ic doesn't become so high by the voltage drop across r1. this characteristic is shown in fig.23. the ovp terminal input current in the voltage lower than the ovp threshold voltage is based on i2 and the input current in the voltage higher than the ovp threshold voltage is the sum of the current flowing to the base of q3 and the current flowing from the collector of q2 to the base. for holding in the latch state,it is necessary that the ovp terminal voltage is kept in the voltage higher than v be of q3. so if the capacitor is connected between the ovp terminal and gnd,even though q2 turns on in a moment by the surge voltage,etc,this latch action does not hold if the ovp terminal voltage does not become higher than v be of q3 by charging this capacitor. for resetting ovp state,it is necessary to make the ovp terminal voltage lower than the ovp l threshold voltage or make vcc lower than the ovp reset supply voltage. as the ovp reset voltage is settled on the rather high voltage of 9.0v,smps can be reset in rather short time from the switch-off of the ac power source if the smoothing capacitor is not so large value. ovp circuit(over voltage protection circuit)section supply voltage vcc(v)
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 19 it is required that the output circuit have the high sink and source abilities for mos-fet drive.it is well known that the "totempole circuit has high sink and source ability.however,it has the demerit of high through current. for example,the through current may reach such the high current level of 1a,if type m51995a has the "conventional" totempole circuit.for the high frequency application such as higher than 100khz,this through current is very important factor and will cause not only the large icc current and the inevitable heat-up of ic but also the noise voltage. this ic uses the improved totempole circuit,so without deteriorating the characteristic of operating speed,its through current is approximately 100ma. output section fig.24 shows one of the example circuit diagram of the start-up circuit which is used when it is not necessary to set the start and stop voltage. it is recommended that the current more than 300? flows through r1 in order to overcome the operation start-up current icc (start) and cvcc is in the range of 10 to 47?.the product of r1 by cvcc causes the time delay of operation,so the response time will be long if the product is too much large. application note of type m51995ap/fp design of start-up circuit and the power supply of ic (1)the start-up circuit when it is not necessary to set the start and stop input voltage just after the start-up,the icc current is supplied from cvcc,however,under the steady state condition ,ic will be supplied from the third winding or bias winding of transformer,the winding ratio of the third winding must be designed so that the induced voltage may be higher than the operation-stop voltage vcc (stop) . the vcc voltage is recommended to be 12v to 17v as the normal and optimum gate voltage is 10 to 15v and the output voltage(v oh ) of type m51995ap/fp is about(vcc-2v). supply voltage vcc(v) 0 5 10 15 20 25 30 35 40 0
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 20 it is not necessary that the induced voltage is settled higher than the operation start-up voltage vcc (start) ,and the high gate drive voltage causes high gate dissipation,on the other hand,too low gate drive voltage does not make the mos-fet fully on- state or the saturation state. it is recommend to use the third winding of "forward winding" or "positive polarity" as shown in fig.25,when the dc source voltages at both the ic operation start and stop must be settled at the specified values. the input voltage(v in(start) ),at which the ic operation starts,is decided by r1 and r2 utilizing the low start-up current characteristics of type m51995ap/fp. the input voltage(v in(stop) ),at which the ic operation stops,is decided by the ratio of third winding of transformer. the v in(start) and v in(stop) are given by following equations. (2)the start-up circuit when it is not necessary to set the start and stop input voltage it is required that the v in(start) must be higher than v in(stop) . when the third winding is the "fly back winding" or "reverse polarity",the v in(start) can be fixed,however,v in(stop) can not be settled by this system,so the auxiliary circuit is required. to avoid the abnormal ic operation,it is recommended to design the vcc is not vary abruptly and has few spike voltage,which is induced from the stray capacity between the winding of main transformer. to reduce the spike voltage,the cvcc,which is connected between vcc and ground,must have the good high frequency characteristics. to design the conductor-pattern on pc board,following cautions must be considered as shown in fig.26. (a)to separate the emitter line of type m51995a from the gnd line of the ic (b)the locate the c vcc as near as possible to type m51995a and connect directly (c)to separate the collector line of type m51995a from the vcc line of the ic (d)to connect the ground terminals of peripheral parts of ics to gnd of type m51995a as short as possible (3)notice to the vcc,vcc line and gnd line m51995a gnd vcc r1 v f cvcc third winding of transformer primary winding of transformer rectified dc voltage from smoothing capacitor fig.25 start-up circuit diagram when it is not necessary to set the start and stop input voltage n p n b v in(start) r1 ?i ccl + ( + 1) ?vcc (start) r2 r1 ~ ...............(9) v in(stop) (vcc (stop)- v f) ? ..........(10) ~ n b n p + 2 1 v' in rip(p-p) where i ccl is the operation start-up current of ic vcc (start) is the operation start-up voltage of ic vcc (stop) is the operation stop voltage of ic v f is the forward voltage of rectifier diode v' in(p-p) is the peak to peak ripple voltage of vcc terminal ~ n p n b v' in rip(p-p) m51995a gnd vcc fig.26 how to design the conductor-pattern of type m51995a on pc board(schematic example) collector emitter cvcc output r clm main transformer third winding (4)power supply circuit for easy start-up when ic start to operate,the voltage of the c vcc begins to decrease till the c vcc becomes to be charged from the third winding of main-transformer as the icc of the ic increases abruptly.in case shown in fig.24 and 25,some "unstable start- up" or "fall to start-up" may happen, as the charging interval of c vcc is very short duration;that is the charging does occur only the duration while the induced winding voltage is higher than the c vcc voltage,if the induced winding voltage is nearly equal to the "operation-stop voltage" of type m51995. it is recommended to use the 10 to 47? for c vcc1 ,and about 5 times capacity bigger than c vcc1 for c vcc2 in fig.27. v in r2
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 21 m51995a cvcc1 main transformer third winding cvcc2 gnd vcc r1 fig.27 dc source circuit for stable start-up it is recommended to connect the capacitor between ovp terminal and gnd for avoiding the miss operation by the spike noise. the ovp terminal is connected with the sink current source (~150?) in ic when ovp does not operate,for absorbing the leak current of the photo coupler in the application. so the resistance between the ovp terminal and gnd for leak- cut is not necessary. if the resistance is connected,the supply current at the ovp reset supply voltage becomes large. as the result,the ovp reset supply voltage may become higher than the operation stop voltage. in that case,the ovp action is reset when the ovp is triggered at the supply voltage a little high than the operation stop voltage. so it should be avoided absolutely to connect the resistance between the ovp terminal and gnd. (1)to avoid the miss operation of ovp ovp circuit m51995a ovp gnd vcc fig.28 peripheral circuit of ovp terminal 10k photo coupler m51995a main transformer third winding cvcc gnd vcc fig.30 ovp setting method using the induced third winding voltage on fly back system the reset time may becomes problem when the discharge time constant of c fin ?(r1+r2) is long. under such the circuit condition,it is recommended to discharge the c vcc forcedly and to make the vcc low value.this makes the ovp-reset time fast. (2)application circuit to make the ovp-reset time fast for the over voltage protection (ovp),the induced fly back type third winding voltage can be utilized,as the induced third winding voltage depends on the output voltage.fig.30 shows one of the example circuit diagram. (3)ovp setting method using the induced third winding voltage on fly back system m51995a fig.29 example circuit diagram to make the ovp-reset-time fast ~ r1 r2 gnd vcc to main transformer c fin cvcc the time constant of this part should be short 470 w ovp
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 22 fig.31 and 32 show the example circuit diagrams around the clm+ and clm- terminal.it is required to connect the low pass filter,as the main current or drain current contains the spike current especially during the turn-on duration of mos-fit. 1,000pf to 22,000pf is recommended for c nf and the r nf1 and r nf2 have the functions both to adjust the "current- detecting-sensitivity" and to consist the low pass filter. (1)peripheral circuit of clm+,clm- terminal current limiting circuit m51995a gnd vcc fig.31 peripheral circuit diagram of clm+ terminal r1 cvcc input smoothing capacitor c fin collector clm+ v out emitter c nf r nf1 r nf2 r clm m51995a gnd vcc fig.32 peripheral circuit diagram of clm- terminal r1 cvcc input smoothing capacitor c fin collector clm+ v out emitter c nf r nf1 r nf2 r clm to design the r nf1 and r nf2 ,it is required to consider the influence of clm terminal source current(i inclm + or i nfclm -), which value is in the range of 90 to 270?. in order to be not influenced from these resistor paralleled value of r nf1 and r nf2 ,(r nf1 /r nf2 )is recommended to be less than 100 w . the r clm should be the non-inductive resistor. fig.33 shows the primary and secondary current wave-forms under the current limiting operation. at the typical application of pulse by pulse primary current detecting circuit,the secondary current depends on the primary current.as the peak value of secondary current is limited to specified value,the characteristics curve of output voltage versus output current become to the one as shown in fig.34. (a)in case of feed forward system (2)over current limiting curve i1 i2 r clm clm fig.33 primary and secondary current waveforms under the current limiting operation condition on feed forward system (a) feed forward system i p1 i p2 i1 i2 (b) primary and secondary current
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 23 under the condition of current limiting operation,the output current i2 continues as shown in fig.33.so the output voltage depends on the product of the input primary voltage v in and the on-duty. if the third winding polarity is positive ,the vcc depends on v in ,so it is concluded that the smoothed voltage of v out terminal depends on the output dc voltage of the smps. so the sharp current limiting characteristics will be got,if the v out voltage if feed back to vf terminal through low pass filter as shown in fig.35. m51995a fig.35 feed back loop through low pass filter from v out to v f terminal v out r vffb c vffb v f it is recommended to use 15k w for r vffb ,and 10,000pf for c vffb in fig.35. fig.36 shows how to control the knee point where the frequency becomes decrease. fig.36 how to control the knee point from v out to vf from v out to vf from v out to vf to make the knee point high to make the knee point low the dc output voltage of smps depends on the vcc voltage of type m51995a when the polarity of the third winding is negative and the system is fly back.so the operation of type m51995a will stop when the vcc becomes lower than "operation-stop voltage" of m51995a when the dc output voltage of smps decreases under specified value at over load condition. (b)in case of fly back system
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 24 m51995a fig.39 application circuit diagram to keep the non-operating condition when over load current condition will continue for specified duration c t ct ovp vcc the output terminal has the current sink ability even though the vcc voltage lower than the "operation-stop" voltage or vcc( stop ) (it means that the terminal is "output low state" and please refer characteristics of output low voltage versus sink current.) this characteristics has the merit not to damage the mos-fit at the stop of operation when the vcc voltage decreases lower than the voltage of vcc( stop ),as the gate charge of mos- fit,which shows the capacitive load characteristics to the output terminal,is drawn out rapidly. the output terminal has the draw-out ability above the vcc voltage of 2v,however,lower than the 2v,it loses the ability and the output terminal potential may rise due to the leakage current. in this case, it is recommended to connect the resistor of 100k w between gate and source of mos-fit as shown in fig.40. (1)the output terminal characteristics at the vcc voltage lower than the "operation-stop" voltage output circuit m51995a r clm fig.40 circuit diagram to prevent the mos-fit gate potential rising v out 100k w to main transformer (2)mos-fit gate drive power dissipation fig.41 shows the relation between the applied gate voltage and the stored gate charge. in the region 1 ,the charge is mainly stored at c gs as the depletion is spread and c gd is small owing to the off-state of mos-fit and the high drain voltage. in the region 2 ,the c gd is multiplied by the "mirror effect" as the characteristics of mos-fit transfers from off-state to on- state. in the region 3 ,both the c gd and c gs affect to the characteristics as the mos-fit is on-state and the drain voltage is low. 20 15 10 5 0 0 4 8 12 16 20 total stored gate charge(nc)
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 25 m51995a v out fig.42 output buffer circuit diagram fig.43 shows how to use the det circuit for the voltage detector and error amplifier. for the phase shift compensation,it is recommended to connected the cr network between det terminal and f/b terminal. det m51995a fig.43 how to use the det circuit for the voltage detector c1 c f/b det c4 r2 b r1 r3 c2 detecting voltage fig.44 shows the gain-frequency characteristics between point b and point c shown in fig.43. the g1, and are given by following equations; 1 2 g1= r1/r2 r3 1 = c2 ?r3 1 2 = c1 ?c2 ?r3 c1 + c2 .............................................(11) ............................................(12) ....................................(13) at the start of the operation,there happen to be no output pulse due to f/b terminal current through c1 and c2,as the potential of f/b terminal rises sharply just after the start of the operation. g avdet (dc voltage gain)
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 26 m51995a gnd emitter fig.47 driver circuit diagram (1) for bipolar transistor when the bipolar transistor is used instead of mos-fit,the base current of bipolar transistor must be sinked by the negative base voltage source for the switching-off duration,in order to make the switching speed of bipolar transistor fast one. in this case,over current can not be detected by detecting resistor in series to bipolar transistor,so it is recommended to use the ct(current transformer). for the low current rating transistor,type m51995a can drive it directly as shown in fig.48. driver circuit for bipolar transistor the maximum ambient temperature of type m51995a is +85?,however,the ambient temperature in vicinity of the ic is not uniform and varies place by place,as the amount of power dissipation is fearfully large and the power dissipation is generated locally in the switching regulator. so it is one of the good idea to check the ic package temperature. the temperature difference between ic junction and the surface of ic package is 15? or less,when the ic junction temperature is measured by temperature dependency of forward voltage of pin junction,and ic package temperature is measured by "thermo- viewer",and also the ic is mounted on the "phenol-base" pc board in normal atmosphere. so it is concluded that the maximum case temperature(surface temperature of ic) rating is 120? with adequate margin. as type m51995 has the modified totempole driver circuit, the transient through current is very small and the total power dissipation is decreased to the reasonable power level.fig.49 shows the transient rush (through)current waveforms at the rising and falling edges of output pulse,respectively. attention for heat generation at rising edge of output pulse v out collector vcc vcc -vss (-2v to -5v) m51995a gnd emitter v out collector vcc bipolar transistor fig.48 driver circuit diagram (2) for bipolar transistor at rising edge of output pulse fig.49 through current waveform of totempole driver circuit at no-load and vcc of 18v condition h-axis : 20ns/div v-axis : 50ma/div h-axis : 20ns/div v-axis : 10ma/div
switching regulator control m51995ap/fp mitsubishi (dig./ana. interface) ( / 27 ) 27 m51995ap r off r on a c fin ac r1 r2 cvcc c t c f f/b ovp on/off v out1 v out2 a application example feed forward types smps with multi-output. collector v out vf

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